d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 1) /*
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 2) * RSB (Reduced Serial Bus) driver.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 3) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 4) * Author: Chen-Yu Tsai <wens@csie.org>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 5) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 6) * This file is licensed under the terms of the GNU General Public License
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 7) * version 2. This program is licensed "as is" without any warranty of any
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 8) * kind, whether express or implied.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 9) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 10) * The RSB controller looks like an SMBus controller which only supports
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 11) * byte and word data transfers. But, it differs from standard SMBus
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 12) * protocol on several aspects:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 13) * - it uses addresses set at runtime to address slaves. Runtime addresses
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 14) * are sent to slaves using their 12bit hardware addresses. Up to 15
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 15) * runtime addresses are available.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 16) * - it adds a parity bit every 8bits of data and address for read and
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 17) * write accesses; this replaces the ack bit
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 18) * - only one read access is required to read a byte (instead of a write
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 19) * followed by a read access in standard SMBus protocol)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 20) * - there's no Ack bit after each read access
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 21) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 22) * This means this bus cannot be used to interface with standard SMBus
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 23) * devices. Devices known to support this interface include the AXP223,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 24) * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 25) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 26) * A description of the operation and wire protocol can be found in the
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 27) * RSB section of Allwinner's A80 user manual, which can be found at
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 28) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 29) * https://github.com/allwinner-zh/documents/tree/master/A80
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 30) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 31) * This document is officially released by Allwinner.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 32) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 33) * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 34) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 35) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 36)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 37) #include <linux/clk.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 38) #include <linux/clk/clk-conf.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 39) #include <linux/device.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 40) #include <linux/interrupt.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 41) #include <linux/io.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 42) #include <linux/iopoll.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 43) #include <linux/module.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 44) #include <linux/of.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 45) #include <linux/of_irq.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 46) #include <linux/of_platform.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 47) #include <linux/platform_device.h>
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 48) #include <linux/pm.h>
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 49) #include <linux/pm_runtime.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 50) #include <linux/regmap.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 51) #include <linux/reset.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 52) #include <linux/slab.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 53) #include <linux/sunxi-rsb.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 54) #include <linux/types.h>
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 55)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 56) /* RSB registers */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 57) #define RSB_CTRL 0x0 /* Global control */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 58) #define RSB_CCR 0x4 /* Clock control */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 59) #define RSB_INTE 0x8 /* Interrupt controls */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 60) #define RSB_INTS 0xc /* Interrupt status */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 61) #define RSB_ADDR 0x10 /* Address to send with read/write command */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 62) #define RSB_DATA 0x1c /* Data to read/write */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 63) #define RSB_LCR 0x24 /* Line control */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 64) #define RSB_DMCR 0x28 /* Device mode (init) control */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 65) #define RSB_CMD 0x2c /* RSB Command */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 66) #define RSB_DAR 0x30 /* Device address / runtime address */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 67)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 68) /* CTRL fields */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 69) #define RSB_CTRL_START_TRANS BIT(7)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 70) #define RSB_CTRL_ABORT_TRANS BIT(6)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 71) #define RSB_CTRL_GLOBAL_INT_ENB BIT(1)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 72) #define RSB_CTRL_SOFT_RST BIT(0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 73)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 74) /* CLK CTRL fields */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 75) #define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 76) #define RSB_CCR_MAX_CLK_DIV 0xff
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 77) #define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 78)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 79) /* STATUS fields */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 80) #define RSB_INTS_TRANS_ERR_ACK BIT(16)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 81) #define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 82) #define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 83) #define RSB_INTS_LOAD_BSY BIT(2)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 84) #define RSB_INTS_TRANS_ERR BIT(1)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 85) #define RSB_INTS_TRANS_OVER BIT(0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 86)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 87) /* LINE CTRL fields*/
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 88) #define RSB_LCR_SCL_STATE BIT(5)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 89) #define RSB_LCR_SDA_STATE BIT(4)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 90) #define RSB_LCR_SCL_CTL BIT(3)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 91) #define RSB_LCR_SCL_CTL_EN BIT(2)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 92) #define RSB_LCR_SDA_CTL BIT(1)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 93) #define RSB_LCR_SDA_CTL_EN BIT(0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 94)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 95) /* DEVICE MODE CTRL field values */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 96) #define RSB_DMCR_DEVICE_START BIT(31)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 97) #define RSB_DMCR_MODE_DATA (0x7c << 16)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 98) #define RSB_DMCR_MODE_REG (0x3e << 8)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 99) #define RSB_DMCR_DEV_ADDR 0x00
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 100)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 101) /* CMD values */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 102) #define RSB_CMD_RD8 0x8b
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 103) #define RSB_CMD_RD16 0x9c
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 104) #define RSB_CMD_RD32 0xa6
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 105) #define RSB_CMD_WR8 0x4e
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 106) #define RSB_CMD_WR16 0x59
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 107) #define RSB_CMD_WR32 0x63
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 108) #define RSB_CMD_STRA 0xe8
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 109)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 110) /* DAR fields */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 111) #define RSB_DAR_RTA(v) (((v) & 0xff) << 16)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 112) #define RSB_DAR_DA(v) ((v) & 0xffff)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 113)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 114) #define RSB_MAX_FREQ 20000000
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 115)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 116) #define RSB_CTRL_NAME "sunxi-rsb"
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 117)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 118) struct sunxi_rsb_addr_map {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 119) u16 hwaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 120) u8 rtaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 121) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 122)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 123) struct sunxi_rsb {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 124) struct device *dev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 125) void __iomem *regs;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 126) struct clk *clk;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 127) struct reset_control *rstc;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 128) struct completion complete;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 129) struct mutex lock;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 130) unsigned int status;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 131) u32 clk_freq;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 132) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 133)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 134) /* bus / slave device related functions */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 135) static struct bus_type sunxi_rsb_bus;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 136)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 137) static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 138) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 139) return of_driver_match_device(dev, drv);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 140) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 141)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 142) static int sunxi_rsb_device_probe(struct device *dev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 143) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 144) const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 145) struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 146) int ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 147)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 148) if (!drv->probe)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 149) return -ENODEV;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 150)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 151) if (!rdev->irq) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 152) int irq = -ENOENT;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 153)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 154) if (dev->of_node)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 155) irq = of_irq_get(dev->of_node, 0);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 156)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 157) if (irq == -EPROBE_DEFER)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 158) return irq;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 159) if (irq < 0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 160) irq = 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 161)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 162) rdev->irq = irq;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 163) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 164)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 165) ret = of_clk_set_defaults(dev->of_node, false);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 166) if (ret < 0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 167) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 168)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 169) return drv->probe(rdev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 170) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 171)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 172) static int sunxi_rsb_device_remove(struct device *dev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 173) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 174) const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 175)
3c15e00e7b58b (Uwe Kleine-König 2020-11-26 11:41:42 +0100 176) drv->remove(to_sunxi_rsb_device(dev));
3c15e00e7b58b (Uwe Kleine-König 2020-11-26 11:41:42 +0100 177)
3c15e00e7b58b (Uwe Kleine-König 2020-11-26 11:41:42 +0100 178) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 179) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 180)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 181) static struct bus_type sunxi_rsb_bus = {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 182) .name = RSB_CTRL_NAME,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 183) .match = sunxi_rsb_device_match,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 184) .probe = sunxi_rsb_device_probe,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 185) .remove = sunxi_rsb_device_remove,
e2bf801ecd4e6 (Stefan Brüns 2017-11-27 20:05:34 +0100 186) .uevent = of_device_uevent_modalias,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 187) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 188)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 189) static void sunxi_rsb_dev_release(struct device *dev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 190) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 191) struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 192)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 193) kfree(rdev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 194) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 195)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 196) /**
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 197) * sunxi_rsb_device_create() - allocate and add an RSB device
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 198) * @rsb: RSB controller
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 199) * @node: RSB slave device node
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 200) * @hwaddr: RSB slave hardware address
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 201) * @rtaddr: RSB slave runtime address
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 202) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 203) static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 204) struct device_node *node, u16 hwaddr, u8 rtaddr)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 205) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 206) int err;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 207) struct sunxi_rsb_device *rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 208)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 209) rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 210) if (!rdev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 211) return ERR_PTR(-ENOMEM);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 212)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 213) rdev->rsb = rsb;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 214) rdev->hwaddr = hwaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 215) rdev->rtaddr = rtaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 216) rdev->dev.bus = &sunxi_rsb_bus;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 217) rdev->dev.parent = rsb->dev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 218) rdev->dev.of_node = node;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 219) rdev->dev.release = sunxi_rsb_dev_release;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 220)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 221) dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 222)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 223) err = device_register(&rdev->dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 224) if (err < 0) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 225) dev_err(&rdev->dev, "Can't add %s, status %d\n",
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 226) dev_name(&rdev->dev), err);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 227) goto err_device_add;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 228) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 229)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 230) dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 231)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 232) err_device_add:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 233) put_device(&rdev->dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 234)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 235) return ERR_PTR(err);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 236) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 237)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 238) /**
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 239) * sunxi_rsb_device_unregister(): unregister an RSB device
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 240) * @rdev: rsb_device to be removed
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 241) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 242) static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 243) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 244) device_unregister(&rdev->dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 245) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 246)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 247) static int sunxi_rsb_remove_devices(struct device *dev, void *data)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 248) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 249) struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 250)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 251) if (dev->bus == &sunxi_rsb_bus)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 252) sunxi_rsb_device_unregister(rdev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 253)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 254) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 255) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 256)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 257) /**
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 258) * sunxi_rsb_driver_register() - Register device driver with RSB core
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 259) * @rdrv: device driver to be associated with slave-device.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 260) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 261) * This API will register the client driver with the RSB framework.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 262) * It is typically called from the driver's module-init function.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 263) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 264) int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 265) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 266) rdrv->driver.bus = &sunxi_rsb_bus;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 267) return driver_register(&rdrv->driver);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 268) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 269) EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 270)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 271) /* common code that starts a transfer */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 272) static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 273) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 274) if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 275) dev_dbg(rsb->dev, "RSB transfer still in progress\n");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 276) return -EBUSY;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 277) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 278)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 279) reinit_completion(&rsb->complete);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 280)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 281) writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 282) rsb->regs + RSB_INTE);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 283) writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 284) rsb->regs + RSB_CTRL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 285)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 286) if (!wait_for_completion_io_timeout(&rsb->complete,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 287) msecs_to_jiffies(100))) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 288) dev_dbg(rsb->dev, "RSB timeout\n");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 289)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 290) /* abort the transfer */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 291) writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 292)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 293) /* clear any interrupt flags */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 294) writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 295)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 296) return -ETIMEDOUT;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 297) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 298)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 299) if (rsb->status & RSB_INTS_LOAD_BSY) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 300) dev_dbg(rsb->dev, "RSB busy\n");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 301) return -EBUSY;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 302) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 303)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 304) if (rsb->status & RSB_INTS_TRANS_ERR) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 305) if (rsb->status & RSB_INTS_TRANS_ERR_ACK) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 306) dev_dbg(rsb->dev, "RSB slave nack\n");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 307) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 308) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 309)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 310) if (rsb->status & RSB_INTS_TRANS_ERR_DATA) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 311) dev_dbg(rsb->dev, "RSB transfer data error\n");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 312) return -EIO;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 313) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 314) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 315)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 316) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 317) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 318)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 319) static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 320) u32 *buf, size_t len)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 321) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 322) u32 cmd;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 323) int ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 324)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 325) if (!buf)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 326) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 327)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 328) switch (len) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 329) case 1:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 330) cmd = RSB_CMD_RD8;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 331) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 332) case 2:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 333) cmd = RSB_CMD_RD16;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 334) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 335) case 4:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 336) cmd = RSB_CMD_RD32;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 337) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 338) default:
2d3e8f70317cc (Andre Przywara 2015-12-22 12:27:43 +0000 339) dev_err(rsb->dev, "Invalid access width: %zd\n", len);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 340) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 341) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 342)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 343) ret = pm_runtime_resume_and_get(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 344) if (ret)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 345) return ret;
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 346)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 347) mutex_lock(&rsb->lock);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 348)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 349) writel(addr, rsb->regs + RSB_ADDR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 350) writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 351) writel(cmd, rsb->regs + RSB_CMD);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 352)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 353) ret = _sunxi_rsb_run_xfer(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 354) if (ret)
43675ffafd3c3 (Dan Carpenter 2015-11-04 01:02:44 +0300 355) goto unlock;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 356)
a43ab30dcd4a1 (Ondřej Jirman 2020-02-21 21:27:26 +0100 357) *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 358)
43675ffafd3c3 (Dan Carpenter 2015-11-04 01:02:44 +0300 359) unlock:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 360) mutex_unlock(&rsb->lock);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 361)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 362) pm_runtime_mark_last_busy(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 363) pm_runtime_put_autosuspend(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 364)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 365) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 366) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 367)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 368) static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 369) const u32 *buf, size_t len)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 370) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 371) u32 cmd;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 372) int ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 373)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 374) if (!buf)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 375) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 376)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 377) switch (len) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 378) case 1:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 379) cmd = RSB_CMD_WR8;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 380) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 381) case 2:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 382) cmd = RSB_CMD_WR16;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 383) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 384) case 4:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 385) cmd = RSB_CMD_WR32;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 386) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 387) default:
2d3e8f70317cc (Andre Przywara 2015-12-22 12:27:43 +0000 388) dev_err(rsb->dev, "Invalid access width: %zd\n", len);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 389) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 390) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 391)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 392) ret = pm_runtime_resume_and_get(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 393) if (ret)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 394) return ret;
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 395)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 396) mutex_lock(&rsb->lock);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 397)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 398) writel(addr, rsb->regs + RSB_ADDR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 399) writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 400) writel(*buf, rsb->regs + RSB_DATA);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 401) writel(cmd, rsb->regs + RSB_CMD);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 402) ret = _sunxi_rsb_run_xfer(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 403)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 404) mutex_unlock(&rsb->lock);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 405)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 406) pm_runtime_mark_last_busy(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 407) pm_runtime_put_autosuspend(rsb->dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 408)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 409) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 410) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 411)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 412) /* RSB regmap functions */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 413) struct sunxi_rsb_ctx {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 414) struct sunxi_rsb_device *rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 415) int size;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 416) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 417)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 418) static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 419) unsigned int *val)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 420) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 421) struct sunxi_rsb_ctx *ctx = context;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 422) struct sunxi_rsb_device *rdev = ctx->rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 423)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 424) if (reg > 0xff)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 425) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 426)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 427) return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 428) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 429)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 430) static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 431) unsigned int val)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 432) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 433) struct sunxi_rsb_ctx *ctx = context;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 434) struct sunxi_rsb_device *rdev = ctx->rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 435)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 436) return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 437) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 438)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 439) static void regmap_sunxi_rsb_free_ctx(void *context)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 440) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 441) struct sunxi_rsb_ctx *ctx = context;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 442)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 443) kfree(ctx);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 444) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 445)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 446) static struct regmap_bus regmap_sunxi_rsb = {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 447) .reg_write = regmap_sunxi_rsb_reg_write,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 448) .reg_read = regmap_sunxi_rsb_reg_read,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 449) .free_context = regmap_sunxi_rsb_free_ctx,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 450) .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 451) .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 452) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 453)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 454) static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 455) const struct regmap_config *config)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 456) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 457) struct sunxi_rsb_ctx *ctx;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 458)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 459) switch (config->val_bits) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 460) case 8:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 461) case 16:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 462) case 32:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 463) break;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 464) default:
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 465) return ERR_PTR(-EINVAL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 466) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 467)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 468) ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 469) if (!ctx)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 470) return ERR_PTR(-ENOMEM);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 471)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 472) ctx->rdev = rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 473) ctx->size = config->val_bits / 8;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 474)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 475) return ctx;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 476) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 477)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 478) struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 479) const struct regmap_config *config,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 480) struct lock_class_key *lock_key,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 481) const char *lock_name)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 482) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 483) struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 484)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 485) if (IS_ERR(ctx))
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 486) return ERR_CAST(ctx);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 487)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 488) return __devm_regmap_init(&rdev->dev, ®map_sunxi_rsb, ctx, config,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 489) lock_key, lock_name);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 490) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 491) EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 492)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 493) /* RSB controller driver functions */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 494) static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 495) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 496) struct sunxi_rsb *rsb = dev_id;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 497) u32 status;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 498)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 499) status = readl(rsb->regs + RSB_INTS);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 500) rsb->status = status;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 501)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 502) /* Clear interrupts */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 503) status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 504) RSB_INTS_TRANS_OVER);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 505) writel(status, rsb->regs + RSB_INTS);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 506)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 507) complete(&rsb->complete);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 508)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 509) return IRQ_HANDLED;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 510) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 511)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 512) static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 513) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 514) int ret = 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 515) u32 reg;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 516)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 517) /* send init sequence */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 518) writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 519) RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 520)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 521) readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 522) !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 523) if (reg & RSB_DMCR_DEVICE_START)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 524) ret = -ETIMEDOUT;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 525)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 526) /* clear interrupt status bits */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 527) writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 528)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 529) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 530) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 531)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 532) /*
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 533) * There are 15 valid runtime addresses, though Allwinner typically
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 534) * skips the first, for unknown reasons, and uses the following three.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 535) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 536) * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 537) * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 538) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 539) * No designs with 2 RSB slave devices sharing identical hardware
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 540) * addresses on the same bus have been seen in the wild. All designs
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 541) * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 542) * there is one, and 0x45 for peripheral ICs.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 543) *
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 544) * The hardware does not seem to support re-setting runtime addresses.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 545) * Attempts to do so result in the slave devices returning a NACK.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 546) * Hence we just hardcode the mapping here, like Allwinner does.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 547) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 548)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 549) static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
427d6e4812cf1 (Chen-Yu Tsai 2015-12-16 17:14:45 +0800 550) { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 551) { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
bccd240fc8ac2 (Chen-Yu Tsai 2015-12-16 17:14:46 +0800 552) { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 553) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 554)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 555) static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 556) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 557) int i;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 558)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 559) for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 560) if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 561) return sunxi_rsb_addr_maps[i].rtaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 562)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 563) return 0; /* 0 is an invalid runtime address */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 564) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 565)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 566) static int of_rsb_register_devices(struct sunxi_rsb *rsb)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 567) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 568) struct device *dev = rsb->dev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 569) struct device_node *child, *np = dev->of_node;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 570) u32 hwaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 571) u8 rtaddr;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 572) int ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 573)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 574) if (!np)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 575) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 576)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 577) /* Runtime addresses for all slaves should be set first */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 578) for_each_available_child_of_node(np, child) {
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 579) dev_dbg(dev, "setting child %pOF runtime address\n",
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 580) child);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 581)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 582) ret = of_property_read_u32(child, "reg", &hwaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 583) if (ret) {
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 584) dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 585) child, ret);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 586) continue;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 587) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 588)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 589) rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 590) if (!rtaddr) {
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 591) dev_err(dev, "%pOF: unknown hardware device address\n",
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 592) child);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 593) continue;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 594) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 595)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 596) /*
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 597) * Since no devices have been registered yet, we are the
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 598) * only ones using the bus, we can skip locking the bus.
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 599) */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 600)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 601) /* setup command parameters */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 602) writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 603) writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 604) rsb->regs + RSB_DAR);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 605)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 606) /* send command */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 607) ret = _sunxi_rsb_run_xfer(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 608) if (ret)
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 609) dev_warn(dev, "%pOF: set runtime address failed: %d\n",
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 610) child, ret);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 611) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 612)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 613) /* Then we start adding devices and probing them */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 614) for_each_available_child_of_node(np, child) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 615) struct sunxi_rsb_device *rdev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 616)
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 617) dev_dbg(dev, "adding child %pOF\n", child);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 618)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 619) ret = of_property_read_u32(child, "reg", &hwaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 620) if (ret)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 621) continue;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 622)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 623) rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 624) if (!rtaddr)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 625) continue;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 626)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 627) rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 628) if (IS_ERR(rdev))
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 629) dev_err(dev, "failed to add child device %pOF: %ld\n",
9c0982d809fd8 (Rob Herring 2017-07-18 16:42:51 -0500 630) child, PTR_ERR(rdev));
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 631) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 632)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 633) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 634) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 635)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 636) static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 637) {
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 638) struct device *dev = rsb->dev;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 639) unsigned long p_clk_freq;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 640) u32 clk_delay, reg;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 641) int clk_div, ret;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 642)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 643) ret = clk_prepare_enable(rsb->clk);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 644) if (ret) {
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 645) dev_err(dev, "failed to enable clk: %d\n", ret);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 646) return ret;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 647) }
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 648)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 649) ret = reset_control_deassert(rsb->rstc);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 650) if (ret) {
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 651) dev_err(dev, "failed to deassert reset line: %d\n", ret);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 652) goto err_clk_disable;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 653) }
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 654)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 655) /* reset the controller */
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 656) writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 657) readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 658) !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 659)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 660) /*
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 661) * Clock frequency and delay calculation code is from
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 662) * Allwinner U-boot sources.
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 663) *
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 664) * From A83 user manual:
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 665) * bus clock frequency = parent clock frequency / (2 * (divider + 1))
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 666) */
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 667) p_clk_freq = clk_get_rate(rsb->clk);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 668) clk_div = p_clk_freq / rsb->clk_freq / 2;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 669) if (!clk_div)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 670) clk_div = 1;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 671) else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 672) clk_div = RSB_CCR_MAX_CLK_DIV + 1;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 673)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 674) clk_delay = clk_div >> 1;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 675) if (!clk_delay)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 676) clk_delay = 1;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 677)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 678) dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 679) writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 680) rsb->regs + RSB_CCR);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 681)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 682) return 0;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 683)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 684) err_clk_disable:
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 685) clk_disable_unprepare(rsb->clk);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 686)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 687) return ret;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 688) }
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 689)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 690) static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 691) {
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 692) /* Keep the clock and PM reference counts consistent. */
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 693) if (pm_runtime_status_suspended(rsb->dev))
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 694) pm_runtime_resume(rsb->dev);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 695) reset_control_assert(rsb->rstc);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 696) clk_disable_unprepare(rsb->clk);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 697) }
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 698)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 699) static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 700) {
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 701) struct sunxi_rsb *rsb = dev_get_drvdata(dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 702)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 703) clk_disable_unprepare(rsb->clk);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 704)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 705) return 0;
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 706) }
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 707)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 708) static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 709) {
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 710) struct sunxi_rsb *rsb = dev_get_drvdata(dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 711)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 712) return clk_prepare_enable(rsb->clk);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 713) }
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 714)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 715) static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 716) {
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 717) struct sunxi_rsb *rsb = dev_get_drvdata(dev);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 718)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 719) sunxi_rsb_hw_exit(rsb);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 720)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 721) return 0;
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 722) }
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 723)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 724) static int __maybe_unused sunxi_rsb_resume(struct device *dev)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 725) {
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 726) struct sunxi_rsb *rsb = dev_get_drvdata(dev);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 727)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 728) return sunxi_rsb_hw_init(rsb);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 729) }
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 730)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 731) static int sunxi_rsb_probe(struct platform_device *pdev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 732) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 733) struct device *dev = &pdev->dev;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 734) struct device_node *np = dev->of_node;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 735) struct resource *r;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 736) struct sunxi_rsb *rsb;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 737) u32 clk_freq = 3000000;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 738) int irq, ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 739)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 740) of_property_read_u32(np, "clock-frequency", &clk_freq);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 741) if (clk_freq > RSB_MAX_FREQ) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 742) dev_err(dev,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 743) "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 744) clk_freq);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 745) return -EINVAL;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 746) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 747)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 748) rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 749) if (!rsb)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 750) return -ENOMEM;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 751)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 752) rsb->dev = dev;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 753) rsb->clk_freq = clk_freq;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 754) platform_set_drvdata(pdev, rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 755) r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 756) rsb->regs = devm_ioremap_resource(dev, r);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 757) if (IS_ERR(rsb->regs))
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 758) return PTR_ERR(rsb->regs);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 759)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 760) irq = platform_get_irq(pdev, 0);
9d4db2f5f0e6d (Stephen Boyd 2019-07-30 11:15:02 -0700 761) if (irq < 0)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 762) return irq;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 763)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 764) rsb->clk = devm_clk_get(dev, NULL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 765) if (IS_ERR(rsb->clk)) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 766) ret = PTR_ERR(rsb->clk);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 767) dev_err(dev, "failed to retrieve clk: %d\n", ret);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 768) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 769) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 770)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 771) rsb->rstc = devm_reset_control_get(dev, NULL);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 772) if (IS_ERR(rsb->rstc)) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 773) ret = PTR_ERR(rsb->rstc);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 774) dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 775) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 776) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 777)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 778) init_completion(&rsb->complete);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 779) mutex_init(&rsb->lock);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 780)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 781) ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 782) if (ret) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 783) dev_err(dev, "can't register interrupt handler irq %d: %d\n",
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 784) irq, ret);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 785) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 786) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 787)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 788) ret = sunxi_rsb_hw_init(rsb);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 789) if (ret)
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 790) return ret;
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 791)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 792) /* initialize all devices on the bus into RSB mode */
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 793) ret = sunxi_rsb_init_device_mode(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 794) if (ret)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 795) dev_warn(dev, "Initialize device mode failed: %d\n", ret);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 796)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 797) pm_suspend_ignore_children(dev, true);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 798) pm_runtime_set_active(dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 799) pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 800) pm_runtime_use_autosuspend(dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 801) pm_runtime_enable(dev);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 802)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 803) of_rsb_register_devices(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 804)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 805) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 806) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 807)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 808) static int sunxi_rsb_remove(struct platform_device *pdev)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 809) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 810) struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 811)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 812) device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 813) pm_runtime_disable(&pdev->dev);
22754ac9a632f (Samuel Holland 2021-01-03 05:06:33 -0600 814) sunxi_rsb_hw_exit(rsb);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 815)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 816) return 0;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 817) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 818)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 819) static void sunxi_rsb_shutdown(struct platform_device *pdev)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 820) {
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 821) struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 822)
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 823) pm_runtime_disable(&pdev->dev);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 824) sunxi_rsb_hw_exit(rsb);
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 825) }
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 826)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 827) static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 828) SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
4a0dbc12e6182 (Samuel Holland 2021-01-03 05:06:35 -0600 829) sunxi_rsb_runtime_resume, NULL)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 830) SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 831) };
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 832)
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 833) static const struct of_device_id sunxi_rsb_of_match_table[] = {
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 834) { .compatible = "allwinner,sun8i-a23-rsb" },
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 835) {}
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 836) };
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 837) MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
014d65b60e46e (Samuel Holland 2021-01-03 05:06:32 -0600 838)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 839) static struct platform_driver sunxi_rsb_driver = {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 840) .probe = sunxi_rsb_probe,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 841) .remove = sunxi_rsb_remove,
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 842) .shutdown = sunxi_rsb_shutdown,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 843) .driver = {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 844) .name = RSB_CTRL_NAME,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 845) .of_match_table = sunxi_rsb_of_match_table,
843107498f91e (Samuel Holland 2021-01-03 05:06:34 -0600 846) .pm = &sunxi_rsb_dev_pm_ops,
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 847) },
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 848) };
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 849)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 850) static int __init sunxi_rsb_init(void)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 851) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 852) int ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 853)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 854) ret = bus_register(&sunxi_rsb_bus);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 855) if (ret) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 856) pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 857) return ret;
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 858) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 859)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 860) return platform_driver_register(&sunxi_rsb_driver);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 861) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 862) module_init(sunxi_rsb_init);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 863)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 864) static void __exit sunxi_rsb_exit(void)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 865) {
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 866) platform_driver_unregister(&sunxi_rsb_driver);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 867) bus_unregister(&sunxi_rsb_bus);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 868) }
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 869) module_exit(sunxi_rsb_exit);
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 870)
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 871) MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 872) MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
d787dcdb9c8f4 (Chen-Yu Tsai 2015-10-23 20:41:31 +0200 873) MODULE_LICENSE("GPL v2");
VisionFive2 Linux kernel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
More than 9999 Commits
32 Branches
54 Tags