b24413180f560 (Greg Kroah-Hartman 2017-11-01 15:07:57 +0100 1) /* SPDX-License-Identifier: GPL-2.0 */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 2) #ifndef __MCB_INTERNAL
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 3) #define __MCB_INTERNAL
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 4)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 5) #include <linux/types.h>
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 6)
b71bb86398918 (Johannes Thumshirn 2014-02-26 17:29:06 +0100 7) #define PCI_VENDOR_ID_MEN 0x1a88
b71bb86398918 (Johannes Thumshirn 2014-02-26 17:29:06 +0100 8) #define PCI_DEVICE_ID_MEN_CHAMELEON 0x4d45
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 9) #define CHAMELEONV2_MAGIC 0xabce
7b7c54914f739 (Johannes Thumshirn 2014-12-16 10:09:20 +0100 10) #define CHAM_HEADER_SIZE 0x200
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 11)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 12) enum chameleon_descriptor_type {
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 13) CHAMELEON_DTYPE_GENERAL = 0x0,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 14) CHAMELEON_DTYPE_BRIDGE = 0x1,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 15) CHAMELEON_DTYPE_CPU = 0x2,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 16) CHAMELEON_DTYPE_BAR = 0x3,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 17) CHAMELEON_DTYPE_END = 0xf,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 18) };
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 19)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 20) enum chameleon_bus_type {
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 21) CHAMELEON_BUS_WISHBONE,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 22) CHAMELEON_BUS_AVALON,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 23) CHAMELEON_BUS_LPC,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 24) CHAMELEON_BUS_ISA,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 25) };
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 26)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 27) /**
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 28) * struct chameleon_fpga_header
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 29) *
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 30) * @revision: Revison of Chameleon table in FPGA
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 31) * @model: Chameleon table model ASCII char
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 32) * @minor: Revision minor
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 33) * @bus_type: Bus type (usually %CHAMELEON_BUS_WISHBONE)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 34) * @magic: Chameleon header magic number (0xabce for version 2)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 35) * @reserved: Reserved
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 36) * @filename: Filename of FPGA bitstream
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 37) */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 38) struct chameleon_fpga_header {
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 39) u8 revision;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 40) char model;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 41) u8 minor;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 42) u8 bus_type;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 43) u16 magic;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 44) u16 reserved;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 45) /* This one has no '\0' at the end!!! */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 46) char filename[CHAMELEON_FILENAME_LEN];
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 47) } __packed;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 48) #define HEADER_MAGIC_OFFSET 0x4
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 49)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 50) /**
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 51) * struct chameleon_gdd - Chameleon General Device Descriptor
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 52) *
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 53) * @irq: the position in the FPGA's IRQ controller vector
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 54) * @rev: the revision of the variant's implementation
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 55) * @var: the variant of the IP core
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 56) * @dev: the device the IP core is
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 57) * @dtype: device descriptor type
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 58) * @bar: BAR offset that must be added to module offset
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 59) * @inst: the instance number of the device, 0 is first instance
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 60) * @group: the group the device belongs to (0 = no group)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 61) * @reserved: reserved
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 62) * @offset: beginning of the address window of desired module
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 63) * @size: size of the module's address window
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 64) */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 65) struct chameleon_gdd {
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 66) __le32 reg1;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 67) __le32 reg2;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 68) __le32 offset;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 69) __le32 size;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 70)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 71) } __packed;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 72)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 73) /* GDD Register 1 fields */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 74) #define GDD_IRQ(x) ((x) & 0x1f)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 75) #define GDD_REV(x) (((x) >> 5) & 0x3f)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 76) #define GDD_VAR(x) (((x) >> 11) & 0x3f)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 77) #define GDD_DEV(x) (((x) >> 18) & 0x3ff)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 78) #define GDD_DTY(x) (((x) >> 28) & 0xf)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 79)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 80) /* GDD Register 2 fields */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 81) #define GDD_BAR(x) ((x) & 0x7)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 82) #define GDD_INS(x) (((x) >> 3) & 0x3f)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 83) #define GDD_GRP(x) (((x) >> 9) & 0x3f)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 84)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 85) /**
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 86) * struct chameleon_bdd - Chameleon Bridge Device Descriptor
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 87) *
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 88) * @irq: the position in the FPGA's IRQ controller vector
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 89) * @rev: the revision of the variant's implementation
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 90) * @var: the variant of the IP core
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 91) * @dev: the device the IP core is
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 92) * @dtype: device descriptor type
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 93) * @bar: BAR offset that must be added to module offset
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 94) * @inst: the instance number of the device, 0 is first instance
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 95) * @dbar: destination bar from the bus _behind_ the bridge
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 96) * @chamoff: offset within the BAR of the source bus
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 97) * @offset:
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 98) * @size:
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 99) */
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 100) struct chameleon_bdd {
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 101) unsigned int irq:6;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 102) unsigned int rev:6;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 103) unsigned int var:6;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 104) unsigned int dev:10;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 105) unsigned int dtype:4;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 106) unsigned int bar:3;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 107) unsigned int inst:6;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 108) unsigned int dbar:3;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 109) unsigned int group:6;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 110) unsigned int reserved:14;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 111) u32 chamoff;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 112) u32 offset;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 113) u32 size;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 114) } __packed;
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 115)
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 116) struct chameleon_bar {
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 117) u32 addr;
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 118) u32 size;
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 119) };
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 120)
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 121) #define BAR_CNT(x) ((x) & 0x07)
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 122) #define CHAMELEON_BAR_MAX 6
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 123) #define BAR_DESC_SIZE(x) ((x) * sizeof(struct chameleon_bar) + sizeof(__le32))
ffc7bb3857e42 (Andreas Werner 2016-08-26 09:34:58 +0200 124)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 125) int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 126) void __iomem *base);
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 127)
3764e82e5150d (Johannes Thumshirn 2014-02-26 17:29:05 +0100 128) #endif
VisionFive2 Linux kernel
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