VisionFive2 Linux kernel

04dc82e1160eb (Thomas Gleixner  2019-06-01 10:08:59 +0200   1) /* SPDX-License-Identifier: GPL-2.0-only */
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   2) /*
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   3)  * PIC32 pinctrl driver
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   4)  *
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   5)  * Joshua Henderson, <joshua.henderson@microchip.com>
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   6)  * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   7)  */
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   8) #ifndef PINCTRL_PINCTRL_PIC32_H
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700   9) #define PINCTRL_PINCTRL_PIC32_H
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  10) 
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  11) /* PORT Registers */
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  12) #define ANSEL_REG	0x00
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  13) #define TRIS_REG	0x10
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  14) #define PORT_REG	0x20
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  15) #define LAT_REG		0x30
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  16) #define ODCU_REG	0x40
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  17) #define CNPU_REG	0x50
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  18) #define CNPD_REG	0x60
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  19) #define CNCON_REG	0x70
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  20) #define CNEN_REG	0x80
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  21) #define CNSTAT_REG	0x90
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  22) #define CNNE_REG	0xA0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  23) #define CNF_REG		0xB0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  24) 
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  25) /* Input PPS Registers */
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  26) #define INT1R 0x04
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  27) #define INT2R 0x08
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  28) #define INT3R 0x0C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  29) #define INT4R 0x10
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  30) #define T2CKR 0x18
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  31) #define T3CKR 0x1C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  32) #define T4CKR 0x20
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  33) #define T5CKR 0x24
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  34) #define T6CKR 0x28
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  35) #define T7CKR 0x2C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  36) #define T8CKR 0x30
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  37) #define T9CKR 0x34
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  38) #define IC1R 0x38
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  39) #define IC2R 0x3C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  40) #define IC3R 0x40
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  41) #define IC4R 0x44
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  42) #define IC5R 0x48
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  43) #define IC6R 0x4C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  44) #define IC7R 0x50
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  45) #define IC8R 0x54
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  46) #define IC9R 0x58
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  47) #define OCFAR 0x60
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  48) #define U1RXR 0x68
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  49) #define U1CTSR 0x6C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  50) #define U2RXR 0x70
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  51) #define U2CTSR 0x74
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  52) #define U3RXR 0x78
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  53) #define U3CTSR 0x7C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  54) #define U4RXR 0x80
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  55) #define U4CTSR 0x84
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  56) #define U5RXR 0x88
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  57) #define U5CTSR 0x8C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  58) #define U6RXR 0x90
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  59) #define U6CTSR 0x94
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  60) #define SDI1R 0x9C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  61) #define SS1INR 0xA0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  62) #define SDI2R 0xA8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  63) #define SS2INR 0xAC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  64) #define SDI3R 0xB4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  65) #define SS3INR 0xB8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  66) #define SDI4R 0xC0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  67) #define SS4INR 0xC4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  68) #define SDI5R 0xCC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  69) #define SS5INR 0xD0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  70) #define SDI6R 0xD8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  71) #define SS6INR 0xDC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  72) #define C1RXR 0xE0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  73) #define C2RXR 0xE4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  74) #define REFCLKI1R 0xE8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  75) #define REFCLKI3R 0xF0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  76) #define REFCLKI4R 0xF4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  77) 
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  78) /* Output PPS Registers */
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  79) #define RPA14R 0x138
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  80) #define RPA15R 0x13C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  81) #define RPB0R 0x140
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  82) #define RPB1R 0x144
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  83) #define RPB2R 0x148
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  84) #define RPB3R 0x14C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  85) #define RPB5R 0x154
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  86) #define RPB6R 0x158
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  87) #define RPB7R 0x15C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  88) #define RPB8R 0x160
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  89) #define RPB9R 0x164
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  90) #define RPB10R 0x168
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  91) #define RPB14R 0x178
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  92) #define RPB15R 0x17C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  93) #define RPC1R 0x184
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  94) #define RPC2R 0x188
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  95) #define RPC3R 0x18C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  96) #define RPC4R 0x190
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  97) #define RPC13R 0x1B4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  98) #define RPC14R 0x1B8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700  99) #define RPD0R 0x1C0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 100) #define RPD1R 0x1C4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 101) #define RPD2R 0x1C8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 102) #define RPD3R 0x1CC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 103) #define RPD4R 0x1D0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 104) #define RPD5R 0x1D4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 105) #define RPD6R 0x1D8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 106) #define RPD7R 0x1DC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 107) #define RPD9R 0x1E4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 108) #define RPD10R 0x1E8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 109) #define RPD11R 0x1EC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 110) #define RPD12R 0x1F0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 111) #define RPD14R 0x1F8
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 112) #define RPD15R 0x1FC
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 113) #define RPE3R 0x20C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 114) #define RPE5R 0x214
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 115) #define RPE8R 0x220
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 116) #define RPE9R 0x224
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 117) #define RPF0R 0x240
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 118) #define RPF1R 0x244
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 119) #define RPF2R 0x248
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 120) #define RPF3R 0x24C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 121) #define RPF4R 0x250
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 122) #define RPF5R 0x254
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 123) #define RPF8R 0x260
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 124) #define RPF12R 0x270
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 125) #define RPF13R 0x274
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 126) #define RPG0R 0x280
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 127) #define RPG1R 0x284
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 128) #define RPG6R 0x298
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 129) #define RPG7R 0x29C
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 130) #define RPG8R 0x2A0
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 131) #define RPG9R 0x2A4
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 132) 
2ba384e6c3810 (Joshua Henderson 2016-02-01 15:48:30 -0700 133) #endif  /* PINCTRL_PINCTRL_PIC32_H */