author: William Qiu <william.qiu@starfivetech.com> 2022-12-15 17:03:28 +0800
committer: William Qiu <william.qiu@starfivetech.com> 2022-12-15 17:03:28 +0800
commit: 574b1b3b2550bed0f9bb1f5ea334a0b0e7160549
parent: 5e6efe042c857d736ac3c3d47df0afe684733832
Commit Summary:
Diffstat:
3 files changed, 25 insertions, 1 deletion
diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-sdio.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-sdio.dts
index 2f7692edfe42..998076eec540 100644
--- a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-sdio.dts
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-sdio.dts
@@ -86,11 +86,17 @@
fragment@3 {
target-path = "/soc/sdio1@16020000";
__overlay__ {
- clock-frequency = <102400000>;
max-frequency = <100000000>;
card-detect-delay = <300>;
bus-width = <4>;
+ no-sdio;
+ no-mmc;
broken-cd;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
cap-sd-highspeed;
post-power-on-delay-ms = <200>;
pinctrl-names = "default";
diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb.dts b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
index d110913947f7..1845c12aaa09 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-evb.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
@@ -30,6 +30,23 @@
status = "okay";
};
+&sdio1 {
+ max-frequency = <100000000>;
+ card-detect-delay = <300>;
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+ broken-cd;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ cap-sd-highspeed;
+ post-power-on-delay-ms = <200>;
+ status = "okay";
+};
+
&usbdrd30 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 6707f6e94c36..3aac6b6a9d09 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -821,6 +821,7 @@
fifo-depth = <32>;
fifo-watermark-aligned;
data-addr = <0>;
+ starfive,sys-syscon = <&sys_syscon 0x9c 0x1 0x3e>;
status = "disabled";
};