author: zejian.su <zejian.su@starfivetech.com> 2023-10-30 16:09:58 +0800
committer: Andy Hu <andy.hu@starfivetech.com> 2023-11-01 15:06:00 +0800
commit: d4ed3c99a15dda46483c4421d78ba212b1012262
parent: 7d7d284f7c210b2b722856a0f9dcf7870a20d4e9
Commit Summary:
Diffstat:
1 file changed, 22 insertions, 0 deletions
diff --git a/include/uapi/linux/jh7110-isp.h b/include/uapi/linux/jh7110-isp.h
index 91254bb509a2..33e0da35c291 100644
--- a/include/uapi/linux/jh7110-isp.h
+++ b/include/uapi/linux/jh7110-isp.h
@@ -49,6 +49,10 @@
(V4L2_CID_USER_JH7110_ISP_BASE + 0x000f)
#define V4L2_CID_USER_JH7110_ISP_STAT_SETTING \
(V4L2_CID_USER_JH7110_ISP_BASE + 0x0010)
+#define V4L2_CID_USER_JH7110_ISP_OUTSS0_SETTING \
+ (V4L2_CID_USER_JH7110_ISP_BASE + 0x0011)
+#define V4L2_CID_USER_JH7110_ISP_OUTSS1_SETTING \
+ (V4L2_CID_USER_JH7110_ISP_BASE + 0x0012)
struct jh7110_isp_wb_gain {
__u16 gain_r;
@@ -325,4 +329,23 @@ struct jh7110_isp_sc_setting {
struct jh7110_isp_sc_awb_config awb_config;
};
+struct jh7110_isp_outss_setting {
+ __u8 which;
+ __u16 stride; // Output Image Stride Register, 8-byte(64bit) granularity.
+ __u8 hsm; // horizontal scale mode
+ __u32 hsf; // horizontal scale factor (time 4096)
+ __u8 vsm; // vertical scale mode
+ __u32 vsf; // vertical scale factor (time 4096)
+};
+
+struct jh7110_isp_sc_buffer {
+ __u32 y_histogram[64];
+ __u32 reserv0[33];
+ __u32 bright_sc[4096];
+ __u32 reserv1[96];
+ __u32 ae_hist_y[128];
+ __u32 reserv2[511];
+ __u16 flag;
+};
+
#endif