author: Emil Renner Berthing <kernel@esmil.dk> 2021-09-20 23:49:31 +0200
committer: Emil Renner Berthing <kernel@esmil.dk> 2022-06-01 23:15:02 +0200
commit: 335e1c630f194e7593cd5a96c7eb26d34564fee6
parent: 06e156a68149eab51c90b57dc56acd452d577ee7
Commit Summary:
Diffstat:
1 file changed, 3 insertions, 1 deletion
diff --git a/drivers/gpu/drm/starfive/starfive_drm_lcdc.c b/drivers/gpu/drm/starfive/starfive_drm_lcdc.c
index 705118b2891b..1e3c0156c0f6 100644
--- a/drivers/gpu/drm/starfive/starfive_drm_lcdc.c
+++ b/drivers/gpu/drm/starfive/starfive_drm_lcdc.c
@@ -2,7 +2,9 @@
/*
* Copyright (C) 2021 StarFive Technology Co., Ltd.
*/
+#include <linux/clk.h>
#include <linux/module.h>
+#include <linux/units.h>
#include <drm/drm_crtc.h>
#include "starfive_drm_lcdc.h"
#include "starfive_drm_vpp.h"
@@ -394,7 +396,7 @@ void lcdc_run(struct starfive_crtc *sf_crtc, uint32_t winMode, uint32_t lcdTrig)
static int sf_fb_lcdc_clk_cfg(struct starfive_crtc *sf_crtc, struct drm_crtc_state *state)
{
- u32 reg_val = 1485000 / state->mode.clock;
+ u32 reg_val = clk_get_rate(sf_crtc->clk_vout_src) / (state->mode.clock * HZ_PER_KHZ);
u32 tmp_val;
dev_dbg(sf_crtc->dev, "%s: reg_val = %u\n", __func__, reg_val);