author: Arnd Bergmann <arnd@arndb.de> 2023-03-27 14:12:58 +0200
committer: Emil Renner Berthing <emil.renner.berthing@canonical.com> 2023-07-20 20:53:34 +0200
commit: 2bb4c09aeb84c9cb6912a1261bb49faa2dcff798
parent: f265eaca05edda71e490bc3ec520a5937e32c49d
Commit Summary:
Diffstat:
3 files changed, 8 insertions, 24 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 2d0d6440b979..2feaccea20f9 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
select ARCH_HAS_DMA_PREP_COHERENT if MMU
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_KCOV
- select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
select ARCH_HAS_DMA_SET_UNCACHED if MMU
select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
{
}
-# define __flush_invalidate_dcache_all() __invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p) __invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s) __invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all __invalidate_dcache_all
+# define __flush_invalidate_dcache_page __invalidate_dcache_page
+# define __flush_invalidate_dcache_range __invalidate_dcache_range
#endif
#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
}
}
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
enum dma_data_direction dir)
{
switch (dir) {
- case DMA_BIDIRECTIONAL:
+ case DMA_TO_DEVICE:
+ do_cache_op(paddr, size, __flush_dcache_range);
+ break;
case DMA_FROM_DEVICE:
do_cache_op(paddr, size, __invalidate_dcache_range);
break;
-
- case DMA_NONE:
- BUG();
- break;
-
- default:
- break;
- }
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
- enum dma_data_direction dir)
-{
- switch (dir) {
case DMA_BIDIRECTIONAL:
- case DMA_TO_DEVICE:
- if (XCHAL_DCACHE_IS_WRITEBACK)
- do_cache_op(paddr, size, __flush_dcache_range);
+ do_cache_op(paddr, size, __flush_invalidate_dcache_range);
break;
-
- case DMA_NONE:
- BUG();
- break;
-
default:
break;
}