author: Himanshu Chauhan <hchauhan@ventanamicro.com> 2023-01-19 20:48:23 +0530
committer: Anup Patel <anup@brainfault.org> 2023-01-23 10:06:14 +0530
commit: 2f40a99c9e0876ac543e918191b2e06ab8a0fdc5
parent: fefa5488038584a6376a8f361e74ccc2183dd50b
Commit Summary:
Diffstat:
1 file changed, 19 insertions, 18 deletions
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 5411bbd..9a1304e 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -30,23 +30,39 @@
/* Beginning of the read-only data sections */
+ PROVIDE(_rodata_start = .);
+
.rodata :
{
- PROVIDE(_rodata_start = .);
*(.rodata .rodata.*)
. = ALIGN(8);
- PROVIDE(_rodata_end = .);
}
- /* End of the read-only data sections */
-
. = ALIGN(0x1000); /* Ensure next section is page aligned */
+ .dynsym : {
+ PROVIDE(__dyn_sym_start = .);
+ *(.dynsym)
+ PROVIDE(__dyn_sym_end = .);
+ }
+
+ .rela.dyn : {
+ PROVIDE(__rel_dyn_start = .);
+ *(.rela*)
+ . = ALIGN(8);
+ PROVIDE(__rel_dyn_end = .);
+ }
+
+ PROVIDE(_rodata_end = .);
+
+ /* End of the read-only data sections */
+
/*
- * PMP regions must be to be power-of-2. RO/RW will have separate
+ * PMP regions must be to be power-of-2. RX/RW will have separate
* regions, so ensure that the split is power-of-2.
*/
- . = ALIGN(1 << LOG2CEIL(SIZEOF(.rodata) + SIZEOF(.text)));
+ . = ALIGN(1 << LOG2CEIL((SIZEOF(.rodata) + SIZEOF(.text)
+ + SIZEOF(.dynsym) + SIZEOF(.rela.dyn))));
PROVIDE(_fw_rw_offset = (. - _fw_start));
@@ -67,19 +83,6 @@
PROVIDE(_data_end = .);
}
- .dynsym : {
- PROVIDE(__dyn_sym_start = .);
- *(.dynsym)
- PROVIDE(__dyn_sym_end = .);
- }
-
- .rela.dyn : {
- PROVIDE(__rel_dyn_start = .);
- *(.rela*)
- . = ALIGN(8);
- PROVIDE(__rel_dyn_end = .);
- }
-
. = ALIGN(0x1000); /* Ensure next section is page aligned */
.bss :